AMD has announced the Versal Premium Series Gen 2, a new adaptive SoC platform designed for high-performance system acceleration. These SoCs are the first FPGAs to feature CXL 3.1, PCIe Gen 6.0, and LPDDR5X memory support, enabling faster data transfer and enhanced performance for demanding workloads.
Enhanced Connectivity and Performance
The Versal Premium Series Gen 2 SoCs leverage the latest interconnect and memory technologies to address the growing demands of data-intensive applications:
- CXL 3.1 and PCIe Gen 6.0: Enable industry-leading host CPU-to-accelerator connectivity with significantly increased bandwidth compared to previous generations.
- LPDDR5X Memory: Supports ultra-fast memory speeds of up to 8533 Mb/s for improved real-time responsiveness and data transfer rates.
"System architects are constantly looking to pack more data into smaller spaces and move data more efficiently...Our latest addition to the Versal Gen 2 portfolio helps customers improve overall system throughput..." - Salil Raje, AMD.
Scalable Memory and Multi-Accelerator Support
The Versal Premium Series Gen 2 offers scalable memory pooling and extension for multiple accelerators through CXL memory expansion modules. This optimized memory utilization allows for efficient operation in multi-accelerator setups without requiring a fabric or switch, while supporting up to two CXL hosts.
Strengthened Data Security
Security is enhanced with features like integrated PCIe Integrity and Data Encryption (IDE) and inline encryption in the DDR memory controllers. 400G High-Speed Crypto Engines further secure data transactions at faster rates.
Availability
Development tools for the Versal Premium Series Gen 2 are expected in Q2 2025, with silicon samples arriving in early 2026. Production is slated to begin in the second half of 2026.
