AMD 3D V-Cache Teardown Reveals Mostly Dummy Silicon

A teardown of AMD's Ryzen 7 9800X3D processor, conducted by semiconductor analyst Tom Wassick, has revealed that a significant portion of the chip consists of dummy silicon. This structure is primarily for providing structural integrity to the chip. 3D V-Cache Stacking Explained The Ryzen 9000 X3D processors stack the L3 SRAM cache chiplet below the heat-generating CCD (compute die). This configuration provides better thermal headroom and enables higher clock speeds. The CCD and 3D V-Cache chiplets are thinned to sub 10µm levels to expose the TSVs (Through-Silicon Vias) for hybrid bonding. Including the BEOL (Back-End of Line), the SRAM and CCD package measures 40-45µm thick. The SRAM die is slightly larger (50µm) than the CCD on all sides. However, most of this additional area is expected to be empty. Excluding interconnects, the SRAM and CCD combined should be less than 20µm thick. The Role of Dummy Silicon To ensure the structural integrity of these thin components, AMD has added …