Intel Foundry Unveils Breakthrough Transistor and Packaging Technologies

Intel Foundry showcased innovative transistor and packaging technologies at IEDM 2024, aiming to enhance silicon scalability and address future comput
Intel Foundry Unveils Breakthrough Transistor and Packaging Technologies
At the IEEE International Electron Devices Meeting (IEDM) 2024, Intel Foundry revealed significant advancements in transistor and packaging technologies, designed to drive future semiconductor innovation. Key Advancements Intel highlighted several key breakthroughs: Subtractive Ruthenium (Ru) This new material aims to improve chip interconnections, reducing line-to-line capacitance by up to 25% at pitches of 25nm or less. It's a cost-effective solution potentially replacing copper damascene in future nodes. Selective Layer Transfer (SLT) SLT is a heterogeneous integration solution that boosts chip-to-chip assembly throughput by up to 100x. This enables smaller, more flexible chiplets for increased functional density and cost efficiency, particularly beneficial for AI applications. Silicon RibbonFET CMOS Intel showcased 6nm gate length silicon RibbonFET CMOS transistors with superior performance and reduced short-channel effects, furthering gate length scaling and supporting Moore's …

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