Following the reveal of the AMD Ryzen 7 9800X3D and the subsequent introductions of the Ryzen 9 9900X3D and Ryzen 9 9950X3D at CES 2025, a key detail emerged: only one of the CCDs (Core Complex Dies) on these dual-CCD models is equipped with the additional 3D V-Cache. This has raised questions about why AMD doesn't include 3D V-Cache on both CCDs, a topic that has been on the minds of many since the Ryzen 7000X3D series.
The Question of Dual 3D V-Cache
With the launch of the Ryzen 7000X3D series, users and experts alike questioned why AMD didn't extend the 3D V-Cache technology to both CCDs in processors with dual CCD configurations. While it was known that AMD had internally tested such a solution, a clear explanation was never officially provided.
Scheduling and Infinity Fabric Latency
A crucial factor involves scheduling—ensuring that game threads run on the Zen 5 cores with the additional cache. Furthermore, these threads should stay on these cores (or this specific CCD) to avoid constant movement between CCDs, a challenge that applies even to dual-CCD versions without the 3D V-Cache. The range of the Infinity Fabric and the associated latencies are also significant considerations.
AMD's Surprising Explanation
When we directly asked AMD about the technical reasons for not utilizing a dual 3D V-Cache setup, their answer was surprising: there are no technical reasons or challenges preventing it. The primary reasons, it turns out, are financial and practical. AMD indicated that such a processor would be too expensive, and, most importantly, games would not benefit as much from a second CCD with 3D V-Cache. The benefit from 32MB to 96MB of L3 cache is much more substantial on one CCD than adding a second CCD with 3D V-Cache.
Considerations and Future Possibilities
AMD has considered multiple times the idea of creating a special edition with dual 3D V-Cache CCDs. However, the cost and limited performance gains for gaming applications led them to ultimately decide against it. While games might see limited performance increases, AMD acknowledges that applications beyond gaming would benefit from having a total of 192 MB of L3 cache for 16 cores. Only AMD knows the exact extent of these potential gains.
Going forward, the argument about technical reasons for not implementing such processors is likely to disappear. The reasoning now appears to be more of a cost vs benefit calculation rather than technical limitations.
Source: hardwareluxx
