An Unexpected Turn TSMC Avoids High-NA EUV for A14, Taiwan Stiffens Regulations Well
Well Here's a wee bit of a shock from the semiconductor world It seems the "chip-giant" TSMC is not so keen on embracing the sheer latest lithography tech – i.e., High-NA EUV – for their upcoming A14 chip process. A bit of a departure from being the tech trendsetter for this company.
Why Not High-NA EUV for A14 It's All About Cost (Mainly)
Instead of with the next-gen High-NA EUV tools, TSMC will implement the proven 0.33-NA EUV technology for its A14 chips entering production in 2028. This has been revealed by TSMC's SVP Kevin Zhang at a recent symposium.
So why not restrain on the new glittering tech In TSMC's opinion, using High-NA EUV on the A14 would contribute significantly to manufacturing costs – up to 2.5 times more than using their current processes. This is because the A14 chip design, High-NA patterned, would require some complicated steps for one layer, incurring additional costs without providing adequate tangible benefits for this process node.
By using the current 0.33-NA EUV and using techniques like multi-patterning, TSMC believes that they are able to address the complexity needed for A14 without increasing the manufacturing cost. Their strategy in this case seems to be keeping cost-cutting for this generation as a priority.
This move does afford competitors like Intel Foundry, which is said to be moving High-NA to its 18A process ahead of TSMC (possibly next year), and certain DRAM manufacturers a temporary head start in the utilization of this specific next-generation tool. However, TSMC is not abandoning High-NA completely; they will be utilizing it for their upcoming A14P node sometime in 2029.
Taiwan, on the other hand, Enacts a New Policy Regarding Advanced Chip Fabrication Overseas
Shifting the topic slightly, there's also significant news out of Taiwan regarding the future of cutting-edge chip manufacturing. It appears the Taiwanese government is a bit anxious about the rapid expansion of companies like TSMC to open high-tech fabs outside Taiwan, particularly in the United States. The US interest, partially motivated by efforts to expand domestic chip manufacturing, has prompted TSMC to invest heavily in the country.
To maintain control of important technology, Taiwan recently passed an amendment to its Industrial Creation Ordinance. The new law essentially attempts to keep the production of the latest chip nodes domestic in Taiwan.
According to this policy, Taiwanese companies' overseas plants will be allowed to manufacture chips but subject to a limitation: they can only produce nodes that are "N-1," one node backward from whatever is the absolute cutting-edge node being produced in Taiwan proper. There is a provision in the law allowing the government to prohibit foreign investment should it pose a threat to national security. This bill is expected to take effect later this year, 2025.
This is a reversal of Taiwan's previous stance of having limited patience for technology transfer overseas. While they now seemingly are more welcoming to companies like TSMC operating overseas, they clearly want to preserve the best level of chip making technology at home. This action likely reassures Taiwanese officials somewhat about TSMC's US ambitions, such as the Arizona factory which aims to reach 1.6nm (A16) by 2030 (although now making 4nm), as Taiwan will be inevitably ahead at that point.
These two items of news illustrate the complex nature of global semiconductor manufacturing, balancing technological advancement, manufacturing cost, and nation strategic interests.
